Design and Testing of Asic Chip for Microprocessors Interfacing in a Digital PABX System

Abstract

An ASIC chip design for interfacing 16-bit microprocessor with 8-bit microprocessor in a digital PABX system was reported. The main features of the chip were as follows: synchronous operation with clock frequency of 13 MHz using +5 V power supply, and having a dual port memory with a capacity of 128 bytes. The algorithm in transferring data between 2 microprocessors through the chip was first in - first out. The design was based on VHDL together with drawing schematic diagram. Workview Plus software was used as simulation and synthesis tools. Simulation results showed good agreement with the specification. After the correct circuit design was obtained, it was programmed into FPGA chip ( XC4010 and XC4003) for testing. Experimental results showed that the chip operated correctly.