JAVA API for Boundary Scan of FPGA System
Keywords:
JAVA, FPGA, IEEE 1149.1, JTAG, design for testability, boundary scanAbstract
Nowadays boundary-scan technique is widely supported by most semiconductor vendors and test system companies. A boundary-scan test bus, sometime called boundary scan is the standard test access port, can now enabled in the FPGA System by adding a few line of VHDL code. This paper presents the designed PC-interface circuit and the designed boundary scan API, which implemented in JAVA to provide an easy way for accessing the test access port of FPGA device. Using the designed API equipped with some low-cost PC hardware interface help us to conquer the complexity task of testing digital system that was designed based on the FPGA devices and it is an alternative method for reducing the test cost of system. The four basic classes and interfaces JavaScanOperations class, JavaScanState class, JavaScanBitIf class, and JavaScanHWIf class are defined as well as an extended JAVA API interface called ScannedObject has been constructed. We test the software on a XC4010E development board. The experiment shows that the result from the boundary-scan port is correspondent to the real-life of the circuit. The maximum scanning frequency equals to 3.3574 KHz which depends on the FPGA device that used in the circuit.
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online 2452-316X print 2468-1458/Copyright © 2022. This is an open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/),
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